This invention relates in general to semiconductor wafer fabrication and, more particularly, to a method for predicting how many operable devices will be obtained from a given semiconductor wafer in light of defects therein.
As electronic systems have continued to grow in importance in modern society, the need for effective fabrication of the semiconductor devices underlying the electronic systems has also grown. The increased need for semiconductor fabrication abilities has also increased the requirements for monitoring the fabrication process. In this regard, as the level of integration increases, the size of the semiconductor devices decreases. As a result, a defect of a given size has an increasingly greater potential for causing a potential failure of a device, such as a short or an interruption of electrical continuity. Consequently, it is important to have information about how many semiconductor devices on a given semiconductor wafer will have to be scrapped because they are inoperable, due to defects introduced in the manufacturing process.
One traditional method of measuring device yields from fabricated semiconductor wafers has involved generating a histogram based on production inspection of the wafers. The histograms show the number of defects on the wafer for each of several defect size ranges. Probability of failure information is estimated based on the design of the devices on the wafer, and a graph curve of this probability of failure information is manually overlaid on the histogram. The histogram with the overlaid probability of failure information are used to estimate a device yield rate for a wafer embodying a particular device design. One of the problems with this known technique is that the number of predicted failures for a given design may be overstated, due to defects being counted multiple times, for example where each layer is inspected after its fabrication and a single defect in one layer is picked up by inspections for that layer and other layers. In addition, this known technique evaluates failure only at the wafer level, and makes no device specific inquiries.
From the foregoing, it may be appreciated that a need has arisen for a method and apparatus for accurately predicting how many operable devices will be obtained from a given semiconductor wafer in light of defects therein.
According to the present invention, a method and apparatus are provided to address this need and involve using design information to generate further information which defines a probability of failure as a function of a defect characteristic for potential defects, and inspecting a part fabricated according to the design information to identify defects therein and at least one characteristic of each defect. The method and apparatus further involve generating a list of defect characteristics which each correspond to a respective defect detected in the part in the inspecting step, using each defect characteristic in the list to determine from the further information a respective corresponding defect failure probability, and combining the defect failure probabilities to determine a survival probability.